An Interleaved AC–DC Converter Based on Current Tracking

In this paper, an interleaved AC-DC converter based on current tracking without any current sharing required is presented and applied to a two-phase flyback converter. This is realized using two critical-conduction-mode (CRM) pulsewidth-modulated chips, together with a field-programmable gate array technique. By doing so, not only are the total harmonic distortion and the power factor improved but the output power is also upgraded. In this paper, the circuit operation is described in detail, with some experimental results given to verify the proposed control scheme.     

Design criteria of the near-millimeter wave quasi-optical monolithic diode-grid frequency multiplier array

The high-frequency performance along with the optimum designs and operating conditions of near-millimeter wave quasi-optical monolithic diode-grid frequency multiplier arrays have been studied and will be presented in this paper. The limitations of the development of nearmillimeter wave quasi-optical monolithic diode-grid frequency multiplier arrays will be discussed in detail. The optimum operating conditions and performance of different device structures are presented along with the associated device physics. The optimum designs, operating conditions and performance of the monolithic diode-grid frequency multiplier array will also be discussed based upon the temperature distribution study on the diode-grid.     

More IMPATIENT: A gridding-accelerated Toeplitz-based strategy for non-Cartesian high-resolution 3D MRI on GPUs

Several recent methods have been proposed to obtain significant speed-ups in MRI image reconstruction by leveraging the computational power of GPUs. Previously, we implemented a GPU-based image reconstruction technique called the Illinois Massively Parallel Acquisition Toolkit for Image reconstruction with ENhanced Throughput in MRI (IMPATIENT MRI) for reconstructing data collected along arbitrary 3D trajectories. In this paper, we improve IMPATIENT by removing computational bottlenecks by using a gridding approach to accelerate the computation of various data structures needed by the previous routine. Further, we enhance the routine with capabilities for off-resonance correction and multi-sensor parallel imaging reconstruction. Through implementation of optimized gridding into our iterative reconstruction scheme, speed-ups of more than a factor of 200 are provided in the improved GPU implementation compared to the previous accelerated GPU code.     

Interface corners in piezoelectric materials

Through proper arrangement, the constitutive law, strain-displacement relation and equilibrium equation of piezoelectric materials can be written in the same mathematical form as those of elastic materials and hence Stroh formalism can be extended for piezoelectric analysis. Based on this viewpoint, the authors’ previous works for fracture analysis of anisotropic elastic materials, e.g. the eigen-relation for determining singular orders, the near-tip solutions, and the unified definition of stress intensity factors for interface corners, can also be applied to piezoelectric materials. In this paper, the theoretical framework of our previous works is briefly introduced, and then an efficient and accurate computing method (H-integral) and its required auxiliary solutions are derived for extracting the stress/electric intensity factors of interface corners made up of piezoelectric materials. This theoretical framework and H-integral form a universal solution technique that is valid for the fracture analysis of cracks, corners, interface cracks, and interface corners. Besides, the special cases that suggest how we simulate elastic insulators/conductors from piezoelectric materials are discussed. Several numerical examples are dealt with to display the feasibility and applicability of the proposed approaches, and finally, a numerical example which exhibits how the electric load influences the fracture behavior is also studied.     

Localized Electrochemical Deposition of Copper Monitored Using Real‐Time X‐ray Microradiography

We have developed a novel strategy for localized electrochemical deposition (LECD) to improve both the lateral resolution of the process and the porosity of the fabricated high‐aspect‐ratio microstructures. The strategy is based on accurately controlling the motion of the anode. Its implementation is made possible by the use of coherent, synchrotron X‐ray microradiography with high time and lateral resolution, enabling the observation of the copper LECD process in real time. Microradiography reveals a deposition mechanism that differs as a function of the distance between the electrode (anode) and the growing structure (cathode). Specifically, the interplay of migration and diffusion of the metal ions in the baths affects the deposition rate and the characteristics of the fabricated structure. This enables us to optimize the anode motion control and greatly improve the quality of the structure grown.     

Accelerating Advanced MRI Reconstructions on GPUs

Computational acceleration on graphics processing units (GPUs) can make advanced magnetic resonance imaging (MRI) reconstruction algorithms attractive in clinical settings, thereby improving the quality of MR images across a broad spectrum of applications. This paper describes the acceleration of such an algorithm on NVIDIA's Quadro FX 5600. The reconstruction of a 3D image with 128(3) voxels achieves up to 180 GFLOPS and requires just over one minute on the Quadro, while reconstruction on a quad-core CPU is twenty-one times slower. Furthermore, relative to the true image, the error exhibited by the advanced reconstruction is only 12%, while conventional reconstruction techniques incur error of 42%.     

Thousand-Core Chips [Roundtable]

The 2007 Design Automation Conference (DAC) had a special session entitled "1000 Core Chips," which was organized by Radu Marculescu (Carnegie Mellon University) and Li-Shiuan Peh (Princeton University). This session examined some of the ramifications of multicore chip design from four perspectives: technology, architecture, programming, and design automation. In this roundtable, held immediately following the conference session, the presenters expounded on the future of multicore chips with respect to education, programming languages, operating systems, and design automation.     

Program decision logic optimization using predication and controlspeculation

The mainstream arrival of predication, a means other than branching of selecting instructions for execution, has required compiler architects to reformulate fundamental analyses and transformations. Traditionally, the compiler has generated branches straightforwardly to implement control flow designed by the programmer and has then performed sophisticated "global" optimizations. to move and optimize code around them. In this model, the inherent tie between the control state of the program and the location of the single instruction pointer serialized run-time evaluation of control and limited the extent to which the compiler could optimize the control structure of the program (without extensive code replication). Predication provides a means of control independent of branches and instruction fetch location, freeing both compiler and architecture from these restrictions; effective compilation of predicated code, however requires sophisticated understanding of the program's control structure. This paper explores a representational technique which, through direct code analysis, maps the program's control component into a canonical database, a reduced ordered binary decision diagram (ROBDD), which fully enables the compiler to utilize and manipulate predication. This abstraction is then applied to optimize the program's control component, transforming it into a form more amenable to instruction level parallel (ILP) execution     

Improvement of hot-electron-induced degradation in MOS capacitorsby repeated irradiation-then-anneal treatments

Improvement of the SiO₂/Si interface degradation due to hot-electron injections from silicon by repeated irradiation-then-anneal treatments is described. Each treatment includes an irradiation of Co-60 with a total dose of 10⁶ rd (SiO₂) and an anneal in N₂ for 10 min successively. It is found that the sensitivity to hot-electron induced damage decreases gradually as the number of irradiation-then-anneal treatments increases. After three such treatments, the MOS capacitor shows excellent behavior in terms of its hardness to hot-electron-induced degradation     

A study of electron beam-induced conductivity in resists.

The charging of polymeric resist materials during electron beam irradiation leads to significant problems during imaging and lithography processes. Charging occurs because of charge deposition in the polymer and charge generation/trapping due to formation of electron-hole pairs in the dielectric. The presence of such charge also results in the phenomena of electron beam-induced conductivity (EBIC). Electron beam-induced conductivity data have been obtained for three commercial e-beam resists under a variety of dose rate and temperature conditions. From the observed values of induced conductivity under varying conditions significant information about the generation of electron-hole pair and the transport of charge in the resist can be obtained. Three electron beam resists, EBR900, ZEP7000, and PBS are examined by an external bias method. The difference in resist chemistry is considered to play the role in the initial state EBIC behaviors among three resists even though the way that it affects the behaviors is not clear. A comparison of the power consumption comparison is proposed as a measure to give a preliminary estimate of the carrier concentration and carrier drift velocity differences among the resists. A simple single trap model with constant activation energy is proposed and provides good agreement with experiment.